Sequence generators are circuits that efficiently step through and output a predetermined sequence of multiple-bit values. Generally an efficient sequence generator is a circuit that occupies a small space on a semiconductor chip. Although it is not difficult to find or generate a variety of sequence generators of any given length of several bits, the qualitative variety of sequences available by conventional configurations is limited. Moreover it is not generally possible to use a given sequence generator without accepting at least a contiguous subset of the repeating sequence it defines.
One approach to addressing this problem is taught in U.S. Pat. No. 6,353,900 (“Coding System Having State Machine Based Interleaver”) issued 5 Mar. 2002 to Sindhushayana et al. The approach is to remove unwanted sequence values with a value filter configured to signal the sequence generator to proceed to the next sequence value when an unwanted value is encountered. Depending on the sequence and the filter, this would apparently require one or several extra clock pulses or significant waits, at one or more sequence positions. What is needed is an implementation that effectively controls a sequence to be generated in a more synchronous fashion.